A remarkable foundry report is not yet a signed production contract

On October 18, 2026, Seoul Economic Daily reported that Samsung Electronics would use TSMC's 3nm process to fabricate the base die for NVIDIA's next-generation custom high-bandwidth memory, NVHBM. Reuters relayed the Korean report. This is a conspicuous possibility because Samsung is both a memory manufacturer and a competitor to TSMC in contract manufacturing.

The distinction between evidence types matters. The manufacturing decision was attributed to industry sources; Samsung, TSMC and NVIDIA have not jointly published final volumes, pricing, qualification results or a production timetable. Reuters citing the original report does not independently establish a finalized contract.

The strategic question is larger than why Samsung might buy a process from a rival. It is why NVIDIA would reportedly require Samsung, SK hynix and Micron, three competing memory makers, to use the same manufacturing process for one customer-defined memory architecture.

Samsung's own HBM4E product uses an in-house 4nm base die

Samsung's May 29 announcement described initial shipments of 12-layer HBM4E samples combining its sixth-generation 10nm-class, or 1c, DRAM with a Samsung Foundry 4nm logic base die. The company disclosed 48GB capacity, speeds up to 16Gbps per pin and 3.6TB/s of bandwidth per stack. Those specifications are company claims, not independent measurements of every customer configuration.

The stacked core dies store data. The base die is the logic layer that connects the memory stack to the AI accelerator and handles critical control and interface work. Samsung's integrated capability across memory, foundry and advanced packaging can enable coordinated development across those layers.

The reported external foundry path concerns NVIDIA's particular customized NVHBM design. It does not establish that Samsung is outsourcing all HBM products or abandoning its integrated HBM4E strategy. The distinction between product families is essential.

The reported requirement is a common rule for three different suppliers

According to the Korean report, NVIDIA asked Samsung, SK hynix and Micron to fabricate NVHBM base dies on TSMC's 3nm node and standardize the core DRAM generation around 1c. Samsung reportedly agreed following internal review.

If each supplier independently implemented an ostensibly common memory design on materially different logic processes, the buyer could face additional performance consistency and qualification work. A shared process might reduce some of those differences, while yield, thermals, stacking and final reliability would still vary between manufacturers.

This would amount to a customer setting part of its suppliers' manufacturing specification, not simply ordering chips that meet a broad performance target. It remains premature to claim that all three suppliers have signed identical production agreements or completed qualification.

NVHBM relocates a key architectural responsibility

NVIDIA described NVHBM on August 26 as a custom HBM base-die technology that brings the memory controller into the HBM stack and uses a customized physical interface. The design aims to make it easier to integrate and qualify leading memory vendors while preserving more accelerator die area for compute.

NVIDIA cites up to 30% more bandwidth per stack, up to 25% more usable compute-die area and up to 15% lower HBM power than standard HBM4e. Those are vendor-described architectural benefits, not independently verified mass-production results from Samsung and TSMC.

NVHBM also sits within NVIDIA's broader NVLink Fusion strategy for companies building custom accelerators. The customer does not merely purchase a faster stack of DRAM; it adopts a memory-interface arrangement intended to fit a larger computing platform.

The buyer could diversify suppliers while concentrating foundry exposure

A buyer that can qualify more than one memory manufacturer has options when negotiating price, delivery and capacity. Common base-die architecture and process choices could reduce some of the friction involved in comparing or validating alternative suppliers.

There is a tradeoff. If three memory vendors all depend on the same TSMC process for the base die, a manufacturing bottleneck at that process could constrain multiple suppliers simultaneously. This is a potential concentration scenario, not evidence that a disruption is already happening.

Nor does using the same process make different HBM products plug-and-play. Memory stacking, advanced packaging, test results and system-level qualification remain necessary. Supply-chain diversification must be mapped by production step, not just by the number of brand names on a sourcing list.

An external route does not mean Samsung has abandoned its own foundry

Samsung continues to promote an integrated manufacturing route for standard HBM4 and HBM4E. Seoul Economic Daily reported that this turnkey approach would remain in place for standard HBM and customized memory supplied to other customers, even if NVIDIA's particular NVHBM uses the reported TSMC route.

The newspaper also cited an industry source discussing an internal Samsung-foundry alternative for NVHBM should TSMC capacity become constrained. This was a report of a possible hedge, not a confirmed decision to start production on Samsung's own node.

For an integrated semiconductor business, the strategic choice need not be 'internal fabrication everywhere' versus 'outsourcing everywhere.' An execution model can preserve in-house process integration where useful while complying with an anchor customer's external-process specification.

The capability requirement crosses several engineering boundaries

Custom HBM connects DRAM design, base-die logic, high-speed interfaces, foundry design rules, advanced packaging, thermal management and system validation. Changes to who fabricates the base die move coordination points between engineering teams and companies.

An external foundry route may make interface specification, process-design coordination, qualification data exchange, quality control and responsibility for failures more important. An in-house route may place more emphasis on integrating the manufacturer's own design and process organizations.

This does not establish any new hiring program or headcount increase at Samsung or its competitors. It is an assessment of the capabilities implied by the published architecture and reported manufacturing choices. The scarce resource may be the ability to connect specialties without losing accountability.

BANSEOG VIEW | The customer can define the rules of competition

Three evidence categories should remain separate. Samsung's use of a 4nm in-house HBM4E base die is officially disclosed. NVIDIA's NVHBM architecture is also officially described. The alleged TSMC 3nm requirement and Samsung's acceptance are industry-source reports.

If the reported arrangement becomes a production reality, NVIDIA could make multi-supplier qualification more manageable while potentially shifting a common bottleneck into one foundry process. Samsung, meanwhile, could have to operate separate customer-specific manufacturing routes. No company can yet be declared the winner on that basis.

A new competitive layer may be forming above the question of which manufacturer makes the best memory: which customer gets to define the design and manufacturing rules the suppliers must follow? Definitive contracts, production capacity, qualification evidence and alternative foundry routes will determine whether the reported change becomes an enduring industry practice.

BANSEOG VIEW

BANSEOG VIEW | The customer starts writing the manufacturing rules

Samsung's own 4nm HBM4E and NVIDIA's NVHBM architecture are official company disclosures. A TSMC 3nm mandate and Samsung's agreement remain industry-source reporting.

Common specifications could ease multi-vendor qualification, but could also concentrate production risk at one foundry. They cannot guarantee identical yield, reliability or interchangeable products.

Competitive advantage can include both in-house design-to-packaging integration and the ability to execute externally specified manufacturing and validation requirements.

SOURCES

Primary sources and references

Prepared Oct 20, 2026. Seoul Economic Daily Oct18 industry-source report on alleged NVIDIA TSMC 3nm/1c standardization and reported Samsung acceptance; Reuters attributed its report to the newspaper. No independent confirmation of definitive joint contracts, yields, production quantities or dates. Samsung May29 official HBM4E: 1c DRAM, in-house 4nm logic base die, 12-layer 48GB, up to 16Gbps/pin, 3.6TB/s per stack. NVIDIA Aug26 official NVHBM benefits up to 30% bandwidth, 25% usable compute-die area and 15% lower HBM power are vendor-presented comparisons with standard HBM4e, not results for any specific mass-produced Samsung-TSMC NVHBM device. Supplier concentration and talent requirements are Banseog analyses. No external copyrighted product photos reused.